Mod-11 Lec-04 Memory Testing-2

So, welcome to the last lecture of the course,that is our reminiscence trying out module number eleven lecture four. So, in the final lecture if youremember now we have discussed that reminiscence blocks incorporate an awfully main a part of circuitsof digital circuits. The an extra essential point we mentioned that two basic bodily change,which makes VLSI testing for reminiscence fairly special from that of synchronous, or asynchronoussynchronous sequential or combinational circuits. So, what you’ve seen that in case of reminiscence,almost the entire memory chips can have one defect or the opposite.So, in the event you hold on findingout the defects in these of the chips you’ll land into the quandary where you willbe near about 0. So, these not like other circuits, the place the yield will also be as excessive as 70 to 80percentage and we shift only the traditional materials. So, that we should not have any false parts, butin case of reminiscence chips, the case is opposite direction round.So, what we ought to do is that we have got to discover redundant elements of the circuit. Notonly we ought to realize, but additionally, to diagnose the faults and then read out the chips byblowing out some chips or blowing out one of the crucial inner connections by means of lasers or someother methods, we’ve got discussed in last category. So, that the misguided rows of the memorychips are I mean are virtually taken out, and the average redundant elements that are alreadythere are rerouted.So, that I mean the erroneous components of the memorychips of the entire rows of the memory chips are bypassed and in place of that the normalrows are introduced in. And there existed certainly done that by using virtual blowing out some fusessome of the probably the most connection in the chip via utilizing fuses. Making use of some lizard techniqueor another techniques, which now we have already mentioned.Secondly, the object was that in case of circuits is the very seven symmetric structure andall the cells of the reminiscence chips are packed very close to every other.So, unlike sequentialcircuits or combinational circuits the fault here are very regular, structure is very regularin nature. So, faults are mainly stuck at zero stuck at 1 they are already there, butalong with that there are a number of other staffs. Like 1 telephone will also be having interface can havinginterference concern with some other cells. So, the other neighboring cells could dominateon that 1, 2 cells could also be having dominating outcomes on other etc.These are the entire problems of memory checking out, but what’s the ease of memory trying out? Theease of memory checking out compared to sequential combinational circuits is that, in case ofsequential and combinational circuits, we have to sensitize the fault propagate throughoutput so forth.So, they may lack in to inconsistency and all those things.However in case of memory checking out, we do not must do something. We ought to simply write somethingin the phone and browse back anything in the mobile. So, the question of propagating, sensitizing,justifying all those complaints does not come into image at all. So, you simply sensitizethe fault that means, you just write 0 and 1 in the respective cells you required, readthem back and your job is done. So, even though the fault modules are bit tricky over right here,however learn how to generate the scan sample making use of them is way less complicated than compared to othercombinational and sequential circuits. So, that now we have already obvious. So, now in todays class that’s on lecture4, what’s going to see that how are you going to scan the reminiscence blocks or reminiscence chips through making use of thephilosophy that the cells have got to be written into some values and you have to read themback, and that’s it and on the way to be finished in a single sequential manner or minor regencyand that must be carried out in a right means.So, if that may be achieved then you could say thatthe chip is traditional or fault , as a entire the chip might not be having could have some rows,that are having faulty rows or cells which might be having defects. So, after shrewd there aresome redundancies you probably have a 1GB reminiscence kind of a stuff. So, you’re going to have more thanthat and the inaccurate rows or the erroneous cells are bypassed and the common or redundant normalrows, or common cells from redundant elements are bought in situation all those erroneous partsby some switching mechanism and the switches. Switches are blown by using some lizard technologiesor another applied sciences. That is the concept. So, at present we can see what’s the most importantthing, which is called the March scan which is I imply the time period 1 of the March, which isapplied commonly used for reminiscence testing and a few others, however we’re simply lookingfor the March scan.So, March experiment essentially entails making use of writing and reading patternsto each mobile within the reminiscence block before continuing to the following cellphone, and if a unique patternis applied that’s the inspiration. So, that is basic concept of March trying out is that, you read andwrite patterns in every telephone before proceeding to the next mobilephone in a predefined method thatis what is the notion. So, either you go in increasing order of thememory or go in decreasing order. Both you go from 0 to 2 to the vigour of n reminiscence locationor you come down from 2 to the vigour of n to zero and you apply some specified pattern ifyou require in a detailed order. You may be writing 0, zero, zero, zero, zero, 0, zero you then might be writing 1,1,1, 1, 1, 1, 1 and so, forth or you may also doing 0, 1, 0, 1, zero, 1, 0, 1 somethinglike that.So, that is truly a exact pattern is required to applied in 1 cellphone,then it usually is applied to other cells and so forth.So, the fundamental notion is that you go this manner otherwise you come this fashion and you either applyall 0s and all 1s or however way with some specified patterns also. So, thatis the basic notion of March trying out, that you simply go from 1 course and then you definately come backin one more direction. Keep on making use of some certain patterns as something required tothe telephone and skim them again. So, March test truly involves the next,in growing order so, take the very usual definition you go up and are available down. So, inincreasing order of memory handle write 0s within the mobilephone that’s the first job. This isthe very preliminary suggestions of March scan there may also be some one of a kind difficult types. So,what you do? You maintain on writing 0s from high to bottom and then decreasing order ofthe cells, learn the cells and write 1 to the cells. Now what you do? From prime you comedown and also you learn every of the cells and if their expected worth is to be zero since, youalready have written zero.So, you will have to learn as 0 and also you write 1 and also you learn a zero andwhen effective you write a 1. Now what you do, so this manner you might have executed,now again you go up, now growing order of cells, read the mobilephone values, anticipated valueis 1 seeing that you’ve written 1 write 0s to the cells and however repeat it. So,let us see this in a pictorial manner.So, in the beginning this is your memory contents. So,this will probably be normally be content on this method nothing however arbitrary values are there. So,you assume that our memory cellphone have 0 to 9 I mean cells .So, that in the order of two,but for the sake of simplicity of putting from 0 to 9 So, what you do? You simply keepon writing a 0s in all of the cells. So, you can write a zero. Now, what you do? So now you come down addressfrom 9 to 0 and also you read a zero due to the fact already zero was once been. So, you learn the values, so, itshould be a zero. Either zero that suggests your correct 0 used to be positive and browse zero can also be, effective.Now, preserve on writing a 1. Now what you do? Now once more you come down, again you learn thecell.So in the beginning the cell was once 1 considering the fact that it was once 1 in earlier phone. You learn 1 youget a 1, then you’re very comfortable that you’ve written a 1 and also you could have read 1also. Now again write a 0 and hold on doing it and read 1 erase it and write it 0 andso, forth. Again you come down and you should expect to get a 0. At this stage you do notwrite anything, means you simply preserve on getting a 0.So, that is what’s the essentially March scan for reminiscence. You go up write all 0s, comedown and browse 0s efficiently write a 1, go up learn zero, 1 efficiently write 0s andyou come down and skim all 0s successfully. So, that is the very normal proposal of memorytest, March experiment based reminiscence for memory. Now what is going to we see next? How these checks?Which are the fault false models? Which you might have already obvious are protected by using this andwhich are the fault models which aren’t covered by way of the March test. So that we must twistour proposal a little bit. So, that’s what we’re going to see. That is very general idea of March test.Now we will be able to see which false fault units arecovered by using this and likewise see one of the most models are not covered by this. So, we will see Imean after which some changes we have got to do. So what is the proposal? For the caught at zero andstack at 1 fault module. So, you see very conveniently we are able to see that stuck at 0 and stuckat 1 fault are covered via this test. So, you write a 0s in all of the cells achieved. Now you preserve on studying the entire cells fromthe back adequate? So you are reading it again that that is 0 nice so you might be writing a 1, youread 0 excellent write a 1 and so on. So, that implies what? There is no stuck at 1 fault inthe memory that is not viable that is the 1.Now what you do? In second step what youhave to assert you could have written all 1s. So, adequate you already know that seeing that you are successfullyreading as zero and writing a 1.So, that you could be very, very definite that there’s a no stuck atone fault within the reminiscence or no stuck at fault within the memory. Now the following thing what you may have achieved? Youhave now once in this step what you do? This assures that there is not any stuck at fault nostuck at fault, seeing that you might learn zero from all of the cells. Now what you have done right here?Now once we are going right here, you’re studying a 1 and writing a zero, reading a 1 and writinga 0. That implies what? There cannot be any stuck at zero faults seeing that, you havent write1 here and studying. Without doubt, March test really does effectually all these stuckat zero and stuck at 1 faults. Now is the transition fault. So, what arethe transition faults? Transition faults are nothing however. You must competent to head from zero to 1 and youshould be capable to head from 1 to zero. That is what the suggestion is. So, in this what is definedhere.Now, allow us to see, how it’s effective, so,what we’re doing here? So, in the first step we see, we are going to write all of the 0s.Next step what we’re doing? We’re reading a zero proper and writing a 1 reading a 0 andwriting a 1. Studying a zero and writing a 1. That’s what we’re doing. Now here what are we doing? We are readinga 1 and writing a 1. That implies what? So, you are reading a zero right here, alternatively of readinga 1 writing a 1 right here. That implies, what here are in first step was, all this stuffs were0.Now you might be reading a 0 right here. That implies, that efficiently 0 was once written here.Now you might be writing a 1 performed? Now on this step you’re reading a 1. That suggests what?The 0 to 1 transition was once triumphant. So, for those who read all 1s right here and you’re writinga 0 of course, but you are reading a 0 and writing a 1 here and reading again the 1.Thatmeans what successfully you would go for 0 to 1 in all of the method. So, a elevating transition,what do you call rising transition fault isn’t there. So, that is genuinely raising transitionfault that isn’t present in any telephone you can assurance. Now let us see the otherway, the 1 to 0 the falling transition faults can also be now not there, that can additionally, be assured.So, let us see that how it is viable by March experiment. So, now in this case you will see,so now. This was about this 1 right here a studying a 1 andwriting a zero, studying a 1 and writing a zero, reading a 1 and dot dot dot dot, reading a1 and writing a 0. Now in this case what you’re doing? So, again you’re reading a zero,studying a zero, studying a 0, reading a 0 etc. So, what you’ve got finished just about?You might be studying a 0 writing a 0 and once more again studying a zero. That means what? These 2steps in reality are fall transition you could have made and right here you might be very exceptional.So, readinga 1, writing a zero and studying again 0 guarantees that there’s no what you name fault transition. So, elevating transition fault and down transitionfault are additionally imply that you may test it very good. So, March test surely takes full care ofstuck at 1 stuck at zero faults and transition faults. Now we will be able to see coupling faults. DoMarch test quilt coupling faults? The reply is really no. So, that you’ll be verysurprised to know that March experiment can very simply go on for twisting its transition faultsand as good as your what which you can name this caught at 0 and caught at 1 fault.But Marchtest as of now I mean some thing we’ve discussed all of us form does no longer cover coupling faults.Let us see why? March test cannot handle coupling faults.So, how it’s executed? You simply take 3 cells i, j and okay. The events is i is the lowestand j is that this. That is the order of memory telephone region. So, in March experiment sequentiallywe will go this way and we will be able to come down this manner. That’s what is the suggestion. So, now we will be able to see that the coupling faultscannot be detected by March experiment means what’s the thought? So, what’s the coupling mobile?So, i is coupled with j and that i can be, coupled with k, it’s coupled with both. So, thisis the coupling cell and f is the coupled cellphone, so fault will occur right here. J and ok aredominating cells. That implies, that this man will manage f and cause fault over right here.So, what’s the fault? That is the fault. So, whenever there may be araise in telephone ok or j that is from 0 to 1, then there will be a problem that f and therewill be a in swing in i and that’s the fault written over here.If there’s a exchange in0 to 1 in telephone j ok there will likely be a transformation in f from this ok additionally. That’s what the phenomena.So, that’s what the fault we are taking and we can see that March experiment cannot detectthis fault. Now what’s that? So, as in March scan we write allcells as 0s performed. So, now what you do? First you in up and when you find yourself taking place. So,you exchange ok from read zero efficaciously and write a 1. So when it’s done? So, this asa fault is there as couples are there can be a swing it’ll be modified into 1. So,this 1 corresponds to swing over here now achieved. You probably have instantly learn mobile i, then youyoull learn that there is a 1 within the telephone i which is a wrong and which you could notice fault.But in March scan we can not do that due to the fact that, you need to go in a sequential order. So,now we next come to this phone, learn effectively a 0 , write a 1.So, that is what once more arise over right here from zero to 1. Right? So, now again there will likely be a swing over right here. Now what will be the swing? The swing willbe from 1 to zero which corresponds to this one and this one and each time reading telephone zero,you’re going to discover a learn zero victorious and you can write a 1 over here. So, even though therewas a coupling fault between this you are not able to become aware of it. So, there was once a fault covering.So, what are the fault masks? J ok and i used to be coupled trade in i, alternate in ok from zero to1 that’s rising frequently.Now, when there may be again a flip in j from zero to 1 once more, iwas again flipped and it used to be made right. So, fault would no longer be detected. So, therewas a mask. So, you might see that coupling faults cannotbe detected by March scan. So, that is the trouble due to the fact that of this interrelation betweenthese three things. However, for those who might have first applied the cell here and then you couldhave checked here, then your job would have been completed. That is you go for a 0 to 1 type of learn 0and write 1 then straight assess right here. So you’ll get a 1 you can, but as March scan goin this sequential and on this sequential order. So, you may have failed in doing that.So, that 1 is the certainly one of very enormous issues in the March scan that we would not handlethe coupling faults due to the fact, we are traversing in this order, but in case you might have I meanif you would in some way bypass this what you call sequential traversal manner, then somethingyou may also be completed.That we will see later. As of now, the confusion is that March testcannot control coupling faults. So, that is what anything I mentioned on phone elevating,inversion raising inversion coupling fault between i and ok mask that’s the fault betweenthis i and k , that’s the fault between i and okay is genuinely masking the fault betweeni and j. So, something we mentioned in different phrases, we are not success full in doing it. So, now we will be able to see I mean how we can helpactually.So, that’s what I mean we discovered that that used to be absolutely a enormous crisis becauseof the sequential traversal we would no longer try this. So, now we must see that how problemcan be solved. So, allow us to see that inverse raising coupling fault on this case one, thisis a mobilephone from zero to 1, zero to 1 transverse whether it is there it’s the cell k say in the celli there is in reality a swing over here. So, this is the phone dominating telephone, the couplingcell and this is the coupled cellphone where fault is there.So, now what you can do? Cell j is to be written.So, what need to do the test? So, you reada write a 0 over here say zero is to read and phone i is to be learn and recall, whateveris the worth is, write a o in ok and bear in mind anything is the worth So, you know that youwrite in okay and take into account the worth that’s x is zero or 1 it is feasible and browse back.Then you read them now cellphone j is to be written with a 1 and it must be read again successfullyyou have completed.And on the other hand you learn again this worth ofcell i and the worth must be same it should not be x inversion. So, this must be rememberedand no inversion will have to be executed. If there’s a case, then that there’s inversingraising coupling fault between cells i and j is longer that you would be able to guarantee. So, basicallywhat we have now carried out? So, we’ve executed a very simple logic.So, we’ve got noticeable what we have now carried out, basicallyas I used to be discussing as that’s equal factor we have finished. So, we now have written a 0 verifiedit, we’ve written a 1 over here sorry we should not have zero over her. Learn the worth ofi over here 0 or something could also be the case, then you definately write a 1 over right here and browse back1. So, that is you’ve successfully long gone for a elevating factor right here, then you are readingback the value of mobile i. So, it will have to remain zero it must now not grow to be 1. So in this caseif you might have achieved. All this clear up this as primary of this havedone simplest March trying out and no longer done anything else, but if the modified March test in whichcase now we have now not long gone in a sequential way. We now have traversed, if the telephone i and j arecoupled and coupling of it so, we go for i and j in 1 shot 1 after an additional can be moresensing between i and j.In a similar way, for the inverse coupling faultyou can do the equal factor. For the phone i say that is phone j say this is the normalcell this is the coupled phone fault causing so, right here you write genuinely a value of a 1and 1 right here learn back then you definitely read the worth of i that is x inform c is to be 0 write a zero.So, there is a fall transition you’ve finished. Once more read again zero and same factor you assurethat i, j is to be zero write a 0 and j verify that 0 is there, so you confirm that down transitionhere, once more read again i and there should not be any x inversion.So, then that you would be able to verify that inversion coupling fault will not be there. So, virtually again whatwe have completed, we’ve got clearly now we have finished traversed and j. Although there is lot of othercells in between now we have carried out the trying out 1 of the consequents I mean we have finished excessi and j thus even if there are lots of other cells in that.However, in this easy ideawe can use March scan for coupling faults. So, in a similar fashion, I imply that basically couplinghappen faults can not be treated by using the uncooked March scan now why is that given that, in Marchtest you go this fashion and you go this manner say if there some fault i and fault j, fault land fault f some thing like this. If these 2 are becoming coupling effect, these 2 aregetting a coupling result variety of a thing sorry 1 instance is exceptional is continually a nice.So, this 2 are coupling effect there can be a variety of cells between it.So, if you are doing anything with this mobile and also you follow whatever with this mobile thenall what happened it’ll get some making influence from the instance.And for those who observe somethingand read whatever once more you follow some thing and skim some thing again, and also you executed jumpbetween these 2. Then there is not any influence truely or intermediate cells impact would possibly not comeinto picture, and we can observe if there’s any kind of a fault over here. That can be very effectively performed. So the ideahere is that by hook or by crook you ought to pass this cells which lie between i and j so, that yourjob is surely finished, that’s the notion. So, now effortlessly you can see that raising idempotentraising coupling faults rising from it is a phone i say j if elevating over right here, you willget a 0 and the coupled mobile that will have to not be in this case. So, it has to be verifiedwith the zero and skim back and also you write a 1 and browse again right read again proper and cellj is to be written with 0 and browse back and then you definately write a 1 over here and browse backand mobilephone j is to be written 1 and browse back that’s the rising transition you could have doneand then you definately learn again you learn a phone i, so surely it is 1 and it’s finished.So, similarity if you want to go for this impudent raising 1 fall, then what you do?You write a 0 over right here write a 0, i learn it, ok.Then telephone j is to be written witha 1. So, that you get a raising transition here and read back the worth of phone. So,that we all know that this fault is just not there. It is extremely easy the inspiration is that insteadof enabling i and j aren’t consecutive, may not be consecutive and lot of reminiscence cellsare there traversed form there to here. So, very simple good judgment we will go for this test.In a similar way, for idempotent falling coupling fault and idempotent falling 1 coupling fault.So, again that is very simple this is i and this is j th, these are falling. So, you haveto write a 1 over here and you need to write zero over right here and browse back. You need to writea 0 over right here and browse again. So, fall is done again return assess that it should be 1. So,write a 1 and browse back 1 sorry here’s a 1 read again 1. So, it must be 1. So, thisis executed. In a similar way if you wish to go for this 1 thisthing.So, you write a 1 over right here write a zero over right here and then write a zero over here readback on this then fall is assured then return and examine 0 is there zero is there. If 0is there, then this fault will not be there. Considering the fact that, this fault surely says that each time a faultis there on this case you’ll no longer get 0, i will get a 1.So, very simple suggestion with the aid of this simple manner I imply first writing j and writing i valueof 1. So, if you’re looking for this sort of fault you write a 1 over right here, when you wanta checking lift fall 0 and whatever.If you wish to experiment for 1 fault here so, you writea 0, 0 faults you write a 1 however if it’s a 0 you write a 0. You’re checkingfor this 1, you write a 1 if you’re checking for this 1 learn again this if you wish to checkfor this, learn back this, if you want to examine for this also. Quite simple and an extraordinarily, verysimple suggestion. Best you must observe that, there may be quite a lot of cells between them doing aboutthis. Once more determined the bridging faults. Now, let us come from the bridging faults.March experiment does precisely this once more we noticed that we are taking AND bridging faults gates.We can see that 0,0, zero, 1, 1, 0 and 1 1. So, all the patterns needs to be applied inbetween all this cells. That is the suggestion. So, any 2 cells can have a coupling result.So, what’s the suggestion? You should have? For making use of fault scan for bridging fault scan youhave to assume that we are really pronouncing that we are go given that these 2 cellsfault. So, you will have to have zero, 0, that is exceptional. You then will have to have 1, 1 that case is alsofine.However, at the moment you should have 0, 1 and 1, 0 scan should be there and we verifythat this 2 coupling combo is probably not possible 0, 1 and 1, 0.These 2 instances might not be viable or not viable in memory in March experiment additionally, when you go strictlyin this and this and this that might not be possible. So, just once more as you could have modifiedthe March test is the satisfactory in case of coupling faults, so, you do the equal thing for thebridging faults. So, implies that i, n and j ought to have 4 combos of this 1. So, no mobilephone pairs have all the 4 combinationsthat is true for each and every n c 2 is the combo I imply all pair of cells should have combination0, 0,zero ,1, 1, 0 ,1, 1, 1, 1 is high-quality as I suppose it could be there, however 0, 1 and 1, 0 may just notbe there. That you would be able to verify and subsequent assessments are there. So, what you need to do is a quite simple idea.Again i, that is j say j each bridging faults both of them have an outcomes.So, you write0, read zero, write zero, learn 0 and again return. So, write phone i and phone write telephone 0 incells i, 0 in telephone j, you write both of this matters and skim again the values. In a similar way,you write a zero over here, write a 1 over here and skim again both and both of them shouldbe zero and 1. Then you definitely write a very simple proposal you writea 1 over here and zero over right here read again each the values, it should be zero and 1.In a similar fashion,you write a 1 right here and write a zero over here and browse again and each will have to be 1 and 0 andboth will have to be equal. There should no longer be any form of the alternate. So, now you see that is what we predict.So, as you know that these are all the experiment for AND bridging faults and similarly, theseare all OR bridging faults additionally, on the grounds that OR bridging faults and AND bridging faults whateveryou take.So, you’re going to discover that 0, 0, 0, 1 theseare the one four stipulations must be applied both in OR bridging faults or AND bridgingfaults. What you’re verifying is that should you write 0, zero you will have to get again 0, 0 andif you are writing zero, 1 you’re going to get 0, 1. In case you are writing 1, zero you will have to getback the worth 1, 0 and 1, 1. So, that is what verifying the reminiscence in case bridgingfaults and for OR additionally, you do the identical thing simplest that the fault impacts can be specific,since, on this case it’s going to be 1, 1 and this might be 1, 1 and so on. So, we are surely simply verifying that incase of bridging fault we are verifying that whatever we’re writing 0, zero, zero, 1, 1, 0,1, 1, they must stay as such. So, we aren’t saying that what is the output whetherit belonging to AND bridging or OR bridging? That isn’t important. We’re verifying thatwe have written 0, zero, zero, 1, 1, zero, 1, 1 and they are retained. And if they are retainedour job is completed. So, surely, it’s going to be AND bridging or OR bridging. So both of themare demonstrated by using the identical approach.That is what just through this I mean these areall additionally you could name March experiment, but only thing is that we are not getting into a sequentialmanner from i to j due to the fact that i may be here, j could also be right here. Quite a lot of intermediate cellswill be we are leaping between these 2 locations, that’s what’s the concept. Now you see, nowwe come back to our what you call these address decoders. So, what you mean by means of the addressdecoders faults? So, the address decoders faults means as already we have now visible thatthis structure was. So, this is what our basic structure. So,what we’ve got seen so, all the March scan basic algorithm coupling faults regional patternfaults or the idempotent faults something are most often to get the memory cells. And this isthe row decoder and this is the column decoder. So, these two we need to test already we havesaid that. These 2 are nothing however some style of combinationalcircuits. So, we are able to go for caught at 0 and caught at 1 and d algorithms and the entire components.However, again we must comprehend that imply we are not going to do that on the grounds that these are notfrequent.Due to the fact that, what’s the job of row and column decoder are very so much fixed, thatis anything value you provide, they entry the corresponding reminiscence cells.So, right here what’s the basic rule we use that say for row and column decoder, you selectthis after which this, then this and then this and also you go within the sequential circuit and suchkind of a sequential manner. And you learn back 0 and write 1 and also you read back zero write1 all these things you do. So, I imply if these 2 matters are finished effectively, and at no pointin time, you are going to get any defect or any type or errorless responses from the reminiscence cells.Something like this 0 write a zero and 1 write a zero and a 1.In such a special sequence you write, in the distinctive cellphone order and again you readback, proper? Then in case your reminiscence and you recognize that 0 in 0, 0 in first telephone of this 1 andsay you write in 2d cell and so forth.So, you recognize that the place you’ve written 1,again you write the whole thing now and again you reading again. So, if this row decoderand column decoder operating pleasant. So, every time you wish to have to entry this thatfile at any time when you need to access this it’s going to access this and whenever it’s going to access thisnever it’s going to happen this if you want to entry this and access this. So, there may also be somealiasing. Typically it is discovered that, in case you are traversing in 1 order and thenyou come again in any other order that’s 1. So, you might be getting each information right,then that you may be very so much certain that there is not any what you can call row decoder for thismeans, this is a very good excessive possibilities are there.Considering, it’s obvious that there canbe a March for instance, this is the primary mobilephone you have written 1 and on this mobile also,you may have 1, we are gaining access to. You want to access this as an alternative you’re having access to to this1. So, there’s some likelihood is there, butyou may just pass over it, however whilst writing an additional kind of patterns and studying it back and writingit the entire ways. So, the likelihood may also be made very excessive. So, you are not discussingthat how the likelihood is made high, which you can discover that references given inthe direction.So, what you are able to do is that what they’ve done is that there are differentsequence of patterns, and also you learn again them in a sequential manner read them back.And then you definitely get the entire date right not only the reminiscence blocks are proper, but additionally,expect that your row and decoder blocks accessing the corresponding the cells on the memoryyou requires are all first-class. In a similar fashion, that these drivers and don’t write separatelyidea is that you write read something from that.So, I mean you read each worth everyBIST thoroughly. Then the inspiration is that cells are working safely. So, right here you might be writingsomething and studying it again. So, in case you are equipped to jot down and browse back that meanswhat? Your driver cells are working safely. That’s the basic philosophy we can use whetherwe should not going to use some analog tactics to try this job.So, by this philosophy wewill see how memory of this March test or exclusive forms of March experiment can be decode. So, you’ll see, a bit of version of Marchtest can scan all four deal with decoders varieties which we’ve noticeable. What had been the four typeslike forms you should no longer get entry to a fallacious reminiscence mobile. So, I mean you should notget, it must not happen that 1 reminiscence address will have to now not access 2 memory cells. It shouldnot occur that 1 address is having access to nothing and will have to also, now not occur that you may getother form of coupling effect, all these four models we have obvious.In fact the suggestion was once that some thing price you want to get, that worth should come out.Itshould not occur that you want to access the worth of x and you might be getting the valueof y. In a similar fashion, it will have to now not occur that you are accessing x and you get the valueof x and y each. All these things must no longer happen. So, I mean the notion is that if youcan entry anything adequately, learn and write back appropriately, entire reminiscence mobile it is vitally,very high probability that row and tackle decoders and browse and write drivers cellsare working exceptional. That’s the basic inspiration. So, what they do? In increasing order of theaddress of the reminiscence cells, you read the value of the reminiscence mobilephone and write the complementof the cells.If a 1 is learn, write as 0, if a 0 following that the identical system ofit. If a worth 1 is read at telephone zero and values of 1 is written into mobilephone 0 and simply writea reverse of it and it’s performed. In lowering order of the reminiscence cells readthe anticipated worth of cells and write the complement price within the mobile, right. The exampleis a quite simple notion like for illustration if you have 0, 0, 0 write, you read zero write 1.So, let us not take 0, zero, zero.Allow us to take the memory phone value 1, zero, 1, 1 anything likethis these are the 4 memory cells you assure. Then what you do? You first read 1, writea 0. Then zero you write a 1 and 1, 0, zero once more you read back zero, zero, 1, 0.So right here the idea is that if you can do that effectively, then the inspiration is that you’re getting access to theproper phone, correct? If 1 was there you inverted it and in order that after you entry this propercell you have to get the worth of 0 it. So, by hazard if there’s a drawback that I meanif this phone was once there and with the aid of chance you need to getting access to the final mobile, but by means of chanceyou are having access to this cellphone. So, you’ll get the worth of 1 and one can find the wayof handle decoders.However, normally you understand the influence of aliasing outcomes additionally, say forexample, if you wish to getting access to this phone if you come and entry this mobile then whatcan occur is that you can find the zero. So, it can be a correct thing. So, it will findaddress decoders in that, however in fact instead of gaining access to this you’re getting access to this one.But, now once more it can be very effectively changed, the place it is checked why you might be I mean so,these are the issues between this cults and the cell. So, which you can just take the 2 as I instructed youdifferent values, now on this case 1, 1, 1, 0 some thing like that. So, one of a kind patternsyou are checking it’s going to come to be zero, zero, 0, 1. If you learn this 1 and you are getting theanswer of this 1, then you could discover the genuine decoder fault over right here. So, that iswhat i’m saying the idea is that you simply do this praise and check out 1 or 2 extraordinary patterns,so what you’re going to discover that by making use of proper quantity of patterns in propersequence which you could discover that even the aliasing affect of tackle decoder fault checking out willbe minimized.So, I imply the elemental precept is that thememory writing and examination operations moves through the reminiscence. Any address decodersfault that expects unexpected entry of reminiscence areas will rationale those places reducesan surprising value. As the experiment processed, it will discover thosefault places and record a fault file file a bulk file. The thought is that you simply write somethingread some thing in one-of-a-kind patterns and in a sequential manner. So, that I mean whatevercell you want to read if you’re not able to get the value from that mobilephone price or youare getting the value from every other cell it eventually it’s flawed. That is the basicidea of address decoder fault. We are not explicitly trying out whether or not, I imply whetherexist in decoder fault or whether there’s a crisis in handle decoder fault as a combinationalcircuit or sequential circuit style of a factor, so that’s the inspiration. Now as I instructed you now we come to another paradigmthat is called basics of memory BIST that is reminiscence BIST.Now why do you require memoryBIST? So, what is the notion of BIST? As we already mentioned so the elemental suggestion of BISTwas that if there is a chip, which is available in the market which was once having no faults you testedusing an the whole thing was accomplished adequately now we’re shifted it to the market. Now, in themarket the chips are in heating result micron results and lot of heating results and allthe impacts are there. So, now the chip could have a trouble when the circuit is when itis running online and the idea is that I mean that’s to your process.Now, what you do with that? So, one factor is that find out if there’s the problemsagain you have got to debug it, find out where is the obstacle and ship the chip, I mean sendit to the client or manufacturer at your work station anywhere the test facility is there.There is a long system which is causing a number of issues on your existence.So, in this case what you may have obvious that you simply put a built in self scan circuit that willat at any time when your circuit starts, as it’ll have hardware pattern generated within, thereis a LSFR so that it will generate some patterns.It’s going to discover if there’s a fault, if thereis any signature compressions, it’s going to find out the faults if there is a fault it willfind out adequate this chip is having predicament. So, that document which you can quite simply you can find outa very treated and an extraordinarily small tester. So, whenever you begin up the procedure like yourmobile cellphone or your computer so, it will say that this chip is having a predicament that becausethat chip has suggested a BIST error and circuit procedure stops working.So, instantly that adequate this chip will not be working and you’re going to take systemto the neighborhood vendor and he will substitute the chip and your system starts working.Thatis we now have already mentioned in elaborately discussion on BIST. So, now as I advised youthat combinational circuits and sequential circuits are as such that the yield is likeok sort of a thing like 60 to 70 percentages. So, kind of the chips are satisfactory in caseof memory, you will have learned that each time each chip you sell roughly there canbe less issues within the memory cells for the reason that, they’re very compact and very near to eachother lot of faults may also be feasible.So, now what you do? That could be a gigantic quandary.So, now what you have got to do? So, what is the general thought? How are you going to clear up the hindrance?To resolve the challenge, what you ought to do is that we must have a BIST there becausememory is extra complicated than combinational or sequential circuits. So, inspiration is that wehave sequential circuits are more tricky and blunder, the place faults are probable or therecan be tons of problems.So, BIST is even more obligatory over hereor more required to have BIST in reminiscence cells. So, all reminiscence chips have BIST. Now in caseof combinational sequential circuit if the BIST circuits studies an error, what we willdo? We without problems say that there’s a situation over right here. So, simply you flag out an errorsaying that there’s the concern and also you have to change the chip. However in case of memoryit isn’t that. So, what you can do? When you have an awfully developed what that you could name reallocation,or changing of the erroneous chips method on circuit, just like i will inform you an illustration.So, for instance when you have suffocated 1 GB of memory, it has already some redundant cellsas I already told you some chips some rows could also be inaccurate so, what you have got to do? Youhave to routinely skip these faulty cells and so, you can get an access I meanfaulty cells can also be bypassed.So, that rather of fault which you can access some redundant orextra usual cells. So, that bypassing arrangement is done by multiplexer by using blowing out somecircuit switches. But now on chip on the reminiscence of working process normal cells can go backBIST will capture that. So, that is what very so much obligatory or verymuch required to have BIST in a memory trying out circuit or in a memory chip. Now BIST willsays that there is a quandary over here so, you must do whatever. Now what you cando? Now you cannot comfortably throw off the chips if the memory chip is lost so, you throw upthis can not be accomplished when you consider that in each cellphone we got to in each ten weeks, or I imply weshould no longer name weeks for each 6 months or 7 months some frequency could have, some cellsof memory chips getting damaged and that can with ease happen when you consider that of the architectureof the memory.Now the BIST will have to detect as wells as to diagnose that. So, that isnot best adequate. Say, for instance, when you’ve got a reminiscence like this. And your this phase is gone bad and that youhave discovered in BIST. So, what you can do? Which you can clearly you are not able to you should notbe able to access this cells that’s the proposal. So, now what you have got to do? So every time youhave a application is getting access to this mobilephone you must actually bypass that to an additional partof the memory.That’s that pass events or bypass mechanism should also be present.That can be carried out on seem to by way of blowing of some switches you can do skip, there isalso, some mechanism that are feasible, we aren’t mentioned since which might be advancedmemory restore manner and then there even supposing the BIST detect an error. So, all thesecells should not operating first-class. So, what you do? You take this one from hereand put the radar within the redundant mobilephone and attach it again.So these are just bypassmechanism. So, bodily these cells are right here, however logically they’re going to be connectedto any other materials of the mobile and internally there should be a mapping of the memory locationsfrom here to the redundant cells. So that’s the very refined notion, but this thingshas to be done and as say you’re utilising a reminiscence chip for say 1 yr or 2 years. So,after frequently you’ll find out that the extra phone are exhausted.Now then what willhappen? Then you will now not get a 1 GB full reminiscence, despite the fact that you’ve purchased the RAMchip of one GB. So, after a protracted a time of use you can also find out amazing memory maybe some 900 MB or whatever like that. You’re going to not get a GB of reminiscence. Now why that’s performed? On the grounds that further cellsare over so, after the cells had been exhausted, even supposing there’s a fault over right here so, whatyou can do? Even though there’s a anything like that even though there’s a fault over here. So,you need to simply bypass this and also you have got to do that here. So, there’s no man overhere to exchange this and right here extra cells are also, exhausted. So, most effective factor is thatyou have got to guarantee that you simply are not able to access these cells in any respect. Given that if you reador write some thing like that we are not in a position to refract again the data. So, if there issome it has entry to that it needs to be bypassed once more from right here to here.However there is no moreextra telephone. So, I imply no extra redundant cells and youcannot do the repairing. So, this is why if you are utilising a ram cell for a long time inyour pc or my laptop in CD homes of your RAM major reminiscence you discover thatif you purchase a four GB reminiscence of RAM 2 GB of reminiscence to your machine, but it is muchlesser than this. But nonetheless your chip is working. That suggests, some a part of the memory have gonebad, however internally memory BISTs and repairing structure has been flexed. So, that yourprograms aren’t accessing those issues, not gaining access to these stuffs. So, that is whathas happened. We will be able to no longer be going into this complex discussion on how reminiscence is repairedand all these things. So, as a substitute what we will do, we will be able to see how memory BIST may also be carried out.We can see the BIST structure for reminiscence. That is how we will become aware of or diagnose thefaults and where cells there’s a quandary and we are going to seem into.Good enough? Furtherwe have how the BISTs will appear like. Adequate so again like, as you already noticeable that 2 typesof LSFR modular, LSFR general and LSFR same factor will likely be also, be used from this oneand now we have additionally, obvious that memory are primitive polynomial. So, that you can generates sequencefrom 1 to dot dot dot 1, three something it may be arbitrary trend. And sooner or later, you willget the answer 2 to the vigor of n minus 1. So, that you could begin from 1, 2. 1, 6, 7, 9, dot dot dot 2 to the energy ofn minus 1. So, that sequence of patterns can also be generated, but the sequence won’t bein a random trend is dependent upon the.One main thing to philophisical again to philophicaldifferences of the BIST from the traditional and sequential and combinational circuits comparedto memory. So, in case of sequential circuits in the event you do not forget on combination of circuits,we cannot generate all zero sequential patterns in a regular manner, that used to be not requiredalso. If that I mean that very, very less required all zero patterns are usually not utilized andthere can be a very huge lot of cells that may not be utilized there are that’s notthe case in 1, or 2 cells may also be misplaced it’s not an extraordinarily basic case. So, in that way that used to be no longer causing a verydeep problem for us, however in case of reminiscence for those who don’t forget that each one zero is a very, veryimportant sample in view that the primary memory region is zero and from there you go to 2 topower of n minus 1 and anything. So, first area is 0 so, all 0 location has to behandled. That could be a very, very primary pattern so, 2d this factor is that if you happen to rememberthat March test or some experiment. So, really what we do? We go in some orderand we come again in same way of order.That may be a normal I imply common fault scan moduleif you consider you have got visible is that a caught at fault transaction fault in a similar way, couplingfaults adequate? The entire coupling faults are there. So, in an awfully equivalent way we have now not discussedhere, however you can discover that this neighborhood sample sensity scan faults may, be easilytested by means of a March test style of a factor, so, they’re quite simple like in case you are takingthis kind of factor. So, in case you have zero, 0, 0, zero, zero, zero, 0. So, if you recognize that the faultis such like something like this. So, all faults are there 0s are near about that youmay not consider this. So, any fault mode whenever any fault mannequin this type of neighborhoodif all cells have zero and then from 1 to zero you can’t have a kind of a fault like 0, zero, 0,zero and then this thing you’re going to accomplish that normally caught 0 form of factor here.Then that you want to try this it is very easy you just put write 0 learn zero, write zero read0, and write 0 read 0.These are the entire neighborhood cells whichever the cells required to writea 1 over right here, make 0 and browse again a zero is feasible. Similar to all of the coupling faultsneighboring patterns faults test might also, be proven like in a quite simple manner byusing March experiment. Handiest thing is that once more this memory vicinity might not be in sequentialmanner. So, you need to access this, access this,entry this, entry this, access this. So, that the proposal is that accepting the stuckat faults and what you name this transition fault for all other coupling faults we enablepattern touchy faults, bridging faults, tackle decoder faults, could also be all faultsyou required to have a March experiment, but the order of access of the memory cells will benot be sequential.So, good enough, however for transition faults and caught at faults what’s the proposal?You go on this way and also you go in this means. So, an extraordinarily, very general requirement of memorytesting is that very basic requirement we say since, we share lot of time constraintsand flying constraints. So, if somebody says that good enough I have to do simplest this very preliminarytest that is caught at fault and transition fault on account that, they are very simple. You applythis order, you practice this order nothing you have to consider. You have got to hold on goingfrom zero, 1, 2, 3, 4, 5, 6, 7, there 7, 6, 5, four, three, 2, 1, 1 that’s it and you ought to write0 learn 1, write 0 learn 1 and your job is done.However if you’re going for coupling fault andneighboring sample touchy faults, then the order of entry of the cells are alsovery, very main. So, if you don’t forget the order of the access of phone that is somepattern of the cells you need to keep in mind. Already you will have obvious that remembering patternis very, very elaborate in case of BIST. For the reason that for those who ought to don’t forget pattern you’ve got togo by the designed in a usual digital design manner and there is to be a lot stare in theidempotent desktop, so that, the subject can be big.So, when you have to wish to go in the arbitrary pattern 1, 2, three, four, 5, 6 and so forth that isalso, very gigantic quantity of knowledge, but you have to go not up to in a predefined method.Predefinedmanner makes the subject to be bit greater, but what’s the easiest? So, if you can go 1,7, 9, 6, 3, four, 2, 1 you can again come again in a random way. So, if which you could traverse thecells in some random nature, then the subject over it’s going to need to be very, very less. So,that is the factor you will be making use of. Like that again let me inform the philosophy againso, if you want to access the reminiscence cells the nice thought is to test the entire memory. So,you need to go for extraordinarily sequentially if the 2 cells having a coupling faults, then thosetwo cells should be entry one after the a different writing zero, studying 1 and many others.If you wish to patter touchy faults for local cells you then have to go for1, 2, four, 1, 0, 1, three, four anything like that. So, this designated order of cells accessredirecting zero or 1 in all those matters that’s in different word you ought to access the cellsin the predefined manner. That is going to be a large trouble considering that, we have alreadyseen that if we need to observe patterns from any standard patterns generator, which willactually in this case generate the handle of cells predefined method is very difficultbecause the area over all subsequent it’s problematic to do all sort of experiment so, we find BISTs ina memory due to the fact that of the area over.Now if you wish to say subsequent stage is what?Subsequent degree is definitely stuck at faults and transition faults minimal. So extra whatyou must go is zero, 1, 2, three, 4, 5, 6,7,eight,9 and say come back. These is also possibleand once more as you’re going from zero, 1, 2, 3, four, but still there may be some sequence becauseof ascending order and descending order don’t forget something. In some ordering with a view to also,kill you the discipline of the BISTs, that’s going to be a very killing aspect.So, what the inspiration they’re going to do isthat we will access the cells in an awfully random method like we are able to go for zero, three, 7, 9 dot dotdot all patterns will quilt one and something like this and once more we can comply with again 1,9, 7, three and 0 they’re very random in nature. So, which you can say that what i’ll try this randomuser traditional LSFR considering, LSFR can generate the values of any random sample dependingthe worth of the character. So, this is why when you are going for randomBISTs so memory BISTs what we’re going to use? We’re going to use March test and basicallytest on the called what you call this stuck at fault and transition fault also, through advancedstudies increase experiences have proven that if you go for transition fault as well as forstuck at fault one of the crucial bridging faults, like I imply you can also no longer have all the sequences0, zero, 0, 1, 1, 0 and 1, 1 ,0 ,0 ,0, 1 all style of that patterns are feasible.However at the 0, zero and 1, 1 patterns will bepossible some thing like this. One of the vital patterns may be viable. Similarly, for thecoupling faults for the regional pattern touchy faults no longer all the patterns aremay be sensitized, however few of them can be executed. So, that you may get an outstanding feelingthat whether or not your memory is operating great or no longer. So, what now we have completed? The elemental philosophyis that of we will be able to not go in a sequential method. We will be able to go in a arbitrary order withoutloss in test ability for this stuck at fault and transitive faults.Now you observe 0 first and first region, second area, fifth place and 7 likethis. 0, 1, 2, 5, 7 this one and descending order 1, 8, 9 this one. So, we are simply doingin the reverse order, these are very random in nature. We can be depending on your LFSRdesign and your suggestions. So, if you’re d this already just doing in a reverse ordervery random in nature do this you already carried out. So, that is what the philosophy be usingfor reminiscence BIST. We will be able to go for easy March test good enough, and thenwe will duvet single stuck at fault and transition fault and few fraction of some other faultswhich we aren’t discussing.And customarily, you probably have time you could learn via thereferences this shows that they are going to also will quilt some few of the other faults percentageof them, and we need not go for an extraordinarily sequential manner. We will do 1 than 3, 7 and 9 and obviouslythat are any 2 compromise scan ability. In view that, in case of March scan also, whatwe do is that March scan for caught at faults and for transition fault there is no couplingeffect. So, each and every individual mobilephone we studied in one more approach like proposal write zero read0, write 1 read 0 and many others. For each and every telephone we affirm independently regardless of others.So there is no ought to trouble zero, 1, 2, three, four, 5 that you can go in a arbitrary order. So,that is what we’re going to follow over this and we will see how it’s completed.So, what’s the basic difference between memory BIST structure LSFTR and we studied andwhich we mentioned in. So, that is the ordinary structure so, which we’ve got module 11 saylast module for those who bear in mind we have also mentioned the regular structure BIST for standardsequential and combinational circuits and we’re additionally, modifying that one just for memoryBIST.See for what the modification is requiredfor this one. Ok? So, right here honestly should you look on the structure so, right here actuallywe have reversed so we’re making use of the typical LSFR modular may also, be designed. But, weare now not watching into that , however on this case the very first thing is that we reverse this order.So, for those who consider that right here we used to have x zero x 1 and x 2 and however now we have now reversethe order .So, what you’ve got executed ? We’ve reversed the order this is the first thingand in the feedback, we have now for those who don’t forget the opposite case so, we will have a feedbackfrom right here then we could have a feedback from right here and we may additionally have a feedback fromhere additionally, no nand gate or whatever like this.However right here we now have introduced 1 nand gate overhere also. Good enough. So, in this case there are 2 differences 1 factor is that this was once x 0, x 0,x 0 here x 1 and x 2 over in the typical case of sequential and combinational circuits,there may be common LFSR or typical circuits and for reminiscence that is reversed and we’ve puta additional nand gate. So, now why you additional nand gate you’ll find out? Sorry NOR gate that is NOR gate why? Becauseyou have got to get the all zero pattern, that could be very, very principal. So, there are two things.Since of this additional x NOR gate and nand gate mixtures so, we will be able to get the all0 sample which was no longer viable in case of this usual LSFR or modular LSFR or normalgeneral circuits like if you don’t forget that this is the feedback used to be like this so, ifyou have a 0 over here, in case you have a zero over here, you probably have a 0 over here, that is theoutput of all the switches are 0 so x add 0 so it is going to stuck at fault in any respect 0s we willhave already seen that.To avert that we have use this one. Let us see how this is carried out. Adequate .So, let ushave that is like that x 0 is the same as zero, this is equal to zero and this equal to 1. So,let this be the present seat ok? And in case of a commonplace ordinary LFSR for common kindof a such thing, we recall that we could ought to go right here and stop considering the fact that this all are themay be patterns to be able to enough to do all of the testing for you.So, we virtually have got to prefer the seat in one of these fashion in order that ,that implies all theimportant patterns of checking out get observe within the very first few iterations and this wecan avoid from here to BIST back. But in case of memory, it’s not there. We need to applyall the patterns within the row that’s from the entire patterns due to the fact, the entire reminiscence locationshave to be accessed. So, all the patterns are equated. So, we with the 0, zero, 0we get the commonplace over right here. You from region 1 and then you’re going to go back to location0. Because if you happen to use zero because the feed, that also you are able to do.However in general concept is that,we first use the entire 1, zero, 1 seed, then from there we go to 0s and again all will probably be progressedin this manner and all of the locations shall be included in this manner. So, that is the prettystandard seed case in reminiscence BISTs and in case of a normal circuits variety of a staffsequential and ordinary combinational circuits. They’re the variety of circuits we use the patterssuch that the important patterns will be utilized first. Now it’s done allow us to see now we have appliedthe pattern zero, zero, zero, 1. So, now the subsequent section you get a 1 over here proper this is a zero overhere 0 over here so nor zero means it’s a 1 over right here 1 and 1 will in reality make a 0 overhere proper it will be a zero over here in a 0 over here will certainly convert a 0 over hereright? So, now what is going to happen here this zero shall be shifted over here and this0 might be shifted over right here.So, you’re going to get the all zero values now you see all zero patternswill get stuck at in case of the LFSR of average type of the circuit how it is not achieved here.So, if you just see that every one 0 patterns over right here so, now what is then you definately get a 0 overhere, now this is the 0 over here recall 0 and 0 NOR gate 1, 1, 0 you get the valueof 1,1,zero and so once more, you get the values. So, now because of this gate association whichis no longer stuck at 1 proposal it’s not caught at zero or o patterns is not there.So you getthis sample 0, 1, 0, 4, 6 so, it covers all of the 1, 2, 3, 4, 5, 6, 7, 8 so, 3 bits, allthe eight reminiscence locations can be covered making use of this.So, just by utilising a easy NOR gate, your job is completed. And these are very, very standardseat you begin from 1 and do that. Now again March experiment is there what you’ve visible thatwe apply some pattern on this order or you write zero learn 1, write zero learn again and so forth.So, you keep on applying this right here. So, now what we ought to performed? You need to once more traversethis, this, this, this, this, this and once more learn back and once more write. So, what could be very,very primary in March experiment is that you just write it in some random order not a difficulty, butwhen you traverse back and also again you must get the identical order in a reveres manner.That is very, very important.We write like zero, 1, 2, three, 4, 5 as much as say 10 now we go thisway and are available back this fashion and this drawback. Now, when you consider that of this sequential difficulty thearea is also bigger so, we’re allowed to head arbitrary like zero, four, 5, 2 anything like this,but what you cannot forgo is that if you a have traversed this you have got to once more comeback. So, at the same time coming again you are not able to traverse in a arbitrary method like 3, 7, 5, 9 likethis for the reason that, then you cannot remember anything. We dont wish to recall which cell weare accessing. Just need to bear in mind that first cellphone, second mobile, 0.33 telephone, fourthcell, fifth telephone and once more coming back to 4, three, 2, 1 and 0, however now we are actuallyavoiding the sequentiality because to lessen of the area overhead of the LSFR.So, now what we do is that even as turning backyou must again take 2, 5, 3, 7 like this. It will have to be in strict reverse order. So that,we can recognize that this is the straight order and at the same time coming back accessing the cellsare in random manner, but the sequence is just reverse. So, that we dont requiredto precisely remember what’s there. So, that is what the overall case so, thisis the reverse case.So, that you just must do 1 is the establishing point far and wide so,0, four, 6, 5, 2 so just you must reverse it 2, 5, 3, 7, 6, 4 so that is what is theidea. In view that of having access to you are not having access to the sequential manner; you’re accessing arandom manner, but even as coming back this strict frequency must be ordered. Ok thenwe can even, see that this is very simple to that. So, considering already we’ve this LSFR nowwe require one other LSFR in blend with just a reverse of this. So, what we have accomplished?So, in this case x zero, x 1, x 2 so, on this case we just have got to reverse it combine the x2, x 1, x 0 and the connections are the equal approach in this one use the NOR gate x 0 casesand that you may discover that right here will generate like when you have the seed is like x zero theseed it is going to be like 1, 0 and when you have the seed memory piece structure. So, whatwe have visible here is that in case of reminiscence BIST, the LSFR measurement needs to be smaller andas in case of the natural general variety of circuit.So, what we’re looking is that, reminiscence BISTyou absolutely see in case of March scan we go for zero, 1, 2, three, four up to n and then againyou need to come back. Ok. So, this reverse sequentility ahead sequential and reversesequentility has to be there. That is very good understood like n minus 1 dot dot 0,but now again you will go in a sequential manner that could be various predicament for areaoverhead for the BIST so, what we can to do is that just we have got to which already discussedtwist the proposal slightly. So, now as a substitute of in reality going from zero, 1, 2, 3, four do dot. So, whatyou can do for the random method you do for 2, 5, 7, 9. 3 like this. So, the notion here is that yougenerate the sequence all this oblivious sequence kind 0 to 2 to the vigor of n minus 1 hasto be generated.However, now right here you do it in random method. So, that may be very easilydone if youre making use of a BIST structure sample generator like LFSR which we havealready mentioned. In the case of general circuit and so, that you could generate a patternin an awfully random means relying on the seed. So, now simplest there are some differences Imean for the reason that if you do not forget in case of this basic circuits, we need to generate, wedont required all zero patterns considering the fact that very not often if the case is happens that every one zero patternsare very so much necessary for big quantity of faults, this isn’t most likely the case.So,however in case of memory BISTs you invariably need to receive the, 0th memory locations, so 0pattern is very a lot required. So, secondly one other philosophy is that so,you might be allowed to traverse say for example there are eight memory places. So, you areallowed to transverse in case of March checking out 1, zero, 4, and 6,7,three,5 that’s most likely real.However, now once more if you want to come back so that you cannot come back in a different arbitrarilyfashion like 5, four, three, 2, 1, zero not like that. The notion is that you just observe some sequence ofpatterns in some sequential reminiscence telephone, you dont take into account precisely which reminiscence cellsyou have written and dont recollect distinct memory region, what you do is that is thecell you write anything read anything and preserve on doing this and while you come backyou just don’t forget that i am just traversing this cells in a reverse way in a particular order.You dont have to don’t forget the mobilephone location which is doing a saving a variety of problems.So, that’s what you might be required in designing the memory base.That that you’re generatinga order in a random fashion, that is nice considering that, the random order iteration is simplyin the LSFR, but whilst touring again you need to precisely travel 2, 5, three, 7, 6,four, 0and 1 something like that . You cannot have any of the arbitrary order of traversal,.Considering you have to consider horribly elaborate for us. Now, we will see how the memory cellcan be designed. So, there may be genuinely bit distinctive somewhatdifferent from the ordinary LFSR average LSFR for average circuit, so what we do? Ifyou remember within the typical design for common circuit it was x zero, x 1 and x 2.But for memoryBIST now we have converted the order we’ve got made the x 2 x 1just because the reversal as good aswe have put a NOR gate now why we have now put a NOR gate? We will be able to see that that is actuallyhelp you to generate all 0 sample. Now again allow us to see another important thingyou bear in mind in that BIST ahead say for the overall cause sequential combinationalcircuit. We used to opt for a circuit in such method so, that the entire important patternswhich are required to experiment a fault are get generated in the first few iterations. So,that from right here that you could reset your circuit and many time we’ve additionally not used the primitivepolynomial many time all viable patterns aren’t required for this one, however in caseof reminiscence BISTs all patterns are required. So, we required a preliminary all these primitivepolynomial so that every one 1 to 2 patterns are required that is one major thing.Theseall memory place is to be accessed. So, in case of the reminiscence BISTs usual whatyou call mobile is a zero, zero, 1 and really common seat for reminiscence BISTs. That you could withthis 1 after which you are going to find out that you’re going to traverse all of the patterns in a randommanner. If you’ll see that you simply which might be the patterns 1, 0, four, 3, 6, 5, 2, 7 and somethinglike that. Adequate so we will be able to see that what the reason of this NOR gate. So, if you apply0, zero, 1 so now you see that1 over here. So, in this case 0 over right here, 0 over right here. So,again on 1 over here and also you get the zero because the output from zero to zero and zero to zero.So, next pattern you keep all of the 0 it’s particularly exciting and if you happen to shouldn’t have aNOR gate, then it is perpetually with the all zero patterns as you have see, now it isall 0s if this sample count on this is not there, then what’s the case? This may occasionally bea zero this will probably be a 0 and this will likely be a 0 and the whole thing can be stuck.So, that isthe case in reminiscence LSFR when you find yourself going for basic sequential circuit, but in caseof this memory BISTs all 0s are required to entry reminiscence location of the memory and youhave to traverse all. So, put an or gate if see that 0 and 0 or on 1 is 1 n or of 0, 0is 1 zero and x or is a 1 so, now it is a 1 over here so this would be the case.1 and 0, 0 so1 here zero right here zero here so, that is the next sample.So, in the event you simply design a BIST it’s quite exceptional kind the sequential and combinationalcircuit so, this is one extra or NOR gate we have used and reverse order so, you canfind out you could generate the pattern on this manner. Now, this is not allowed so wehave generated a random pattern it will entry your entire memory cells in this distinct order.So, the order could also be very arbitrary and however this thing when the job is completed.Now yet another LSFR we also required since you have got to traverse 2, 5,three,7,6 you cannothave an extra LSFR and one more arbitrary seed and traverse in a order like 5, 3, 7, 2, zero,1.So, considering the fact that for those who do that you need to remember that 1 is accessed 0 is accessedand when you find yourself traversing back, which is the replacement approach of entry. So, that willmake you a lifestyles horrible. So, idea is that you simply access this in theorder and you access back on this order. Then you definately dont require remembering anything.You understand that first you have access this and last you will have accessed this that’s the onlything you have to do not forget. So, what we do? We surely that is written in a very elaborateway on this slide that if that is the primary order, then the reverse order will have to be exactlythis one.So, what we virtually do is that 1 is a pretty first-class seed.So, you at all times start from 1 and end in 1, however for the other elements that is zero, four, 6, three,7, 2 and this section we absolutely reverse I imply you are going to get in a reveres trend forwardfashion, and reverse trend the thought is that you do not the full sequence, I imply thatreverse trend will have to be actually be 2, 5,3,7,0 and after that 1 will have to be the case. However makingthat could be very problematic considering the fact that of the NOR gate association and all in case you have a starseed as 1 approach you can do some thing very simply in that you would be able to find out the little work youcan find out. So, common inspiration is that in very initial seedis 1, we will see this 1 and constantly we start from 1 and we end in 1 and the sample is0, four, 6, 7, three, 2 that is precisely reveres in the other way.So, you’re going to get 2 ,7, 2, three,5 the reverse it is going to be 2 , 5, three, 7, 6, four, zero that is these two patterns are all reversedand 1 is the preliminary and this one. So, then you recognize that i’m gaining access to this way andreverse way i’m getting access to this manner so, dont must take into account the mobile identify.So, we’re utilising a BIST on this manner but what we’ve got doing by means of having access to the cells in arandom method what’s the competencies? The field of the BISTs LFSR are sample generator forthe LSFR may be very simple. It is just equals to some x or gate and NOR gate access forgenerate patterns. So, we’re doing a March test most effective, however we aren’t go in a sequentialapproach. So, getting into a sequential procedure we can make an awfully excessive subject function forthe tackle generator, which is the pattern generator in case of LSFR. By this technique we are very easily testingstuck at 0 fault and transition faults. Given that the stuck at 0 fault and transition faults,we’re taking 1 cell and verifying the opposite cellphone.Writing zero, writing 1 and writing zero,writing 1. In a similar way, for this phone additionally. So, we aren’t taking any kind of couplingin between this 2. We are checking with caught at zero, stuck at 1 stuck at zero , stuck at 1,raising, falling and raising falling. So, we don’t assess any variety of coupling.So that you either entry this 1 first or this 1 first, it does not have any topic, thereare no requirement for any style of sequence or pre-outlined sequence for getting access to. Theonly thing is that you simply will have to do not forget that i have accessed this one earlier than and this Ihave access this one after this for the reason that, or else there will be a crisis. This is the reason if you’re getting into a sequenceI mean 1, 2, 3, four if you are stepping into a chain of this one in the forward new release and backwardor if you’re going or a coupling fault testing or regional sensitive testing in thiscase the architecture will be complex.You have got to do not forget that telephone zero, mobile 1, cell3, phone 4, you must write on this certain order, what’s the value of write, this andagain you have got to entry mobilephone no 2 and faulty cells and so forth. So, if that’s the case you BIST architecture willbe very tricky. Mostly we no longer go on for that complexity considering the fact that your BIST subject hardwarewill be very, very high and we also, mentioned that it has been located that for those who go 100percent checking out for caught at and transit faults reminiscence in BIST. So, different faults will also,get listed that is given the drawback of the field of that.So, again the equal LFSR just a bit reverse in this case you make it 2 over right here and x0 over here and it is going to generate a required pattern like 1, 2, 5, 6 and what you callthis pattern which you might be producing zero and this one in a reverse means. So, this LFSR.So taken this equal LFSR this is the LSFR which is generating the forward sequence like 0,1, 4 this thing and now we are doing it in a reverse way simply we’re reversing this 1and linked 1 are reversed.So, as I informed you most of the time use 0, 0, and1 at the seed and you will discover that you may generate the pattern over right here in a reverseway. So, what is that quite simple LFSR, however werequire a pair model to move about the March test. Adequate. So, this in regards to the sample mills,so this is the very essential phase that is this is the fundamental a part of whole BIST architecturefor the memory. So, this LFSR we have now already discussed. So, it has a ahead and backwardaddress generator. So it was genuinely generate the deal with in some sequence 1, zero, 3,2,5,7and 2, 5 whatever like that. So, this is the LFSR in order to generate atthe ahead and backward deal with. So, we’re utilizing a random order of addressing and againcoming again within the reverse order. So, we’ve noticeable that may be very easily completed with theLSFR simply with the aid of including a number of x or gate and the NOR gate that may be very simple. So, this areais very, very rare and we are competent to move within the some phase in random order ahead andsome random order within the backward that’s possible.Now what you do is that so, should you take into account in case of typical BISTs or that is in theBISTs for natural circuit kind of a thing so, what we’ve got performed? So, we have taken whatyou say that you have to recollect the golden response stored in a ram and now we have doneit, however in this case what we do is that and once more where do you store the golden responsein some type of a reminiscence.So, in this case already we have now a reminiscence.So, dont have got to put any further memory saved within the golden response. So, what we do isthat we divide the memory in to 2 blocks adequate and what you do? You write identical entry sayit could also be have reminiscence could also be say 0 to a hundred. So, what we do? We go from zero to 50 and 51to 100 over right here. Now what you do is that something you do with this phone, you do thesame thing for this cellphone. Some thing you do for this phone you do same thing for this telephone.Now what you do? You read from this and also you learn from this and also you fit cells with theirequal quantity. So that you would be able to think that this is your golden memory, and that is your testmemory or the opposite direction which you can feel that this is the golden reminiscence and that is thetest reminiscence.So, whatever you do, you do with 2 memoriesblocks separately. When you need to read some thing you verify each of them are equal, if bothof them are equal then you’re finished. So, that is absolutely a zero and 1 when you consider that you’ve gotten towrite a 0 and a 1. So, something the data you want to write that’s the zero in some telephone.So, this is your driver already we know, this LSFR tackle generator are directly connectedto you row and column decoder and information is attached to you learn that’s your read staffthat is your cellphone circuit what you name the driver circuit into the information.The very, veryimportant factor is that we do not require a additional memory to retailer the golden response,since we already have our reminiscence blocks. So, what we do is that we divide the wholememory in to 2 halves some thing you do with this reminiscence March test, identical thing you dofor this 1 at the same time comparing you find out the some difference that’s all that you would be able to say thisis the golden section, this is the scan section, of this is the golden part and this is thetest phase.The very abilities of memory disk block is BIST that we do not have got to do anyextra incorrect to retailer the golden response good enough. So, this all concerning the definitions block thatwe have designed LSFR already informed that is generates the handle in some distinctive randomorder. Data which surely writes 0 and 1s within the cells and that’s nothing however yourwhat you call phone and driver circuit. Equality comparator that’s the 1 thing todefinitely to have, so simply to discover the info equal or not. So, these are very simplecombinational circuit and obliviously you require a controller to control the controlsequences for all of them. That is very simple and knowledge absolutely will have what you calldriver cells and equally you’ve gotten compare this equality operators which is unassuming bycalling a sequence of x OR gates is discreet through calling a sequence of x OR gates. So, this completesactually our design for what structure for memory BISTs. Now you find out the faults,so that you need to go for repairing already instructed you so, we’re not discussing due to the fact that it isvery elaborate.With this we come to the phase query andanswer a part of it. So, let us see the primary question is what is the total quantity of allpossible passive network pattern sensitivity faults and energetic passive community passivesensitivity faults in form 1 and form 2 neighborhoods. So, we all know that what’s the passive fault?So, that passive faults have been that so, I imply that there’s truely some youcan feel about this 1 and this 1. So what are the passive faults?So, there may also be some patterns over this field in sort if you are because in sort 1 neighborhood.So, we all know that this 1, say this 1, this 1, this and this 1 say you place all 0s good enough andthen you are not capable to move for a elevate fault.So, this is some thing variety of a factor. Ifyou want to elevate it, still you t to get the value as 0. So, similarity if you have all1s here and you want to make a 0 over right here. You are making a fall like here 1 to 0 over right here.So, that you just can not do it. So, all 1s will hold the worth as 1. So, that is all aboutthe passive thing, considering there’s no trade in periphery of your fault cell. So, thatactually keeping the cellphone value. So, there are certainly 3 forms of this factor.So, 1 factor is that periphery shouldn’t be permitting to move to 1, periphery isn’t permitting to comedown to 0 or periphery is just not enabling to alter it. So, these are the form 1 neighborhoodand this is type of faults in variety 1 local already we all know that there are 4 cells 1,2, three, four, ok and 3, four . So, what is the all viable patterns over right here? It is 2 to thepower four of adequate zero, zero, zero, 1, zero, 0, 0, 1, 0, 1.So, there are four cells are there so, you canhave two three patterns and what’s going to be the three forms of faults this are the three types offaults. So, three into 2 to the vigour of four. So, all possible viable.Now we know in style 2 neighborhood what number of cells we regarded? Alongside this 4 anotherboundary cells are there. So, there are 7 what you call 7 cells within the periphery ofthe erroneous is style 2 nearby. So, all patterns is viable is 2 to the vigor of7 and what is the quantity of faults? It is 3. So 3 into 2 to the vigor of 7. So, differenttypes NPSF faults will also be there. In a similar fashion should you go for lively employees, activeNPSF you know that so, what is the concept? So, the inspiration is that let us don’t forget the type1 handiest. So, there are four nearby cells. And there may be some activity change over herein some either of the cells like for illustration, we’ve got already mentioned about this like0, 0, zero, 0 if you are altering it from zero to 1. So, it should occur that this guy can be,getting change from zero to 1, it can be stuck at kind of a thing.So, there should be some pastime in b1, b2, b3 or b4.Then fault have an impact on is there. So,there are two varieties of faults as we all know that if v cut is 1, then that you can have that stuckat 0 faults here. If v cut is zero, then we can have stack at 1fault over right here. Correct if thevalue is 1 we can make it 0, stuck at zero. If this cellphone is one, we make it to zero. So, stuckat fault 0 and stuck at 1 fault are viable on this one. But, there will have to be some activityin peripherals. So, now each and every telephone can have 3 values , eachcells can have 0 say values raising and falling zero and 1 are static, however raising and fallingone of them have got to be in 1 of the cells to motive the faults. So, there 4 viable staffhere zero, 1 and elevating and falling.So, in this case four to the energy 4 different kindsof patterns can also be feasible within the cells like four cells are there and four one of a kind forms ofpatterns are viable. How many faults are there? There are 2 kindsof faults caught at 0 and caught at 1 form of things. So, all viable patterns are 2 into 4 to the vigor of four. Now if you take a local patterns style 2 neighborhoods.So, we all know that numbers of cells within the regional are how many right here? 7. So, 2 into four to thepower of seven. 2 varieties of faults are there. If you happen to take this type of regional cells 7cells will be round, adequate? And that is the telephone. So the two types of faults, like this1 is 1 fault and this 1 is 1 fault. So, 4 distinct types of patterns are viable,in each mobile quantity of cells are 7, the no of faults are 2, no of cells are 1. So, nextquestion is the final reply it’s cleared that trying out style 1 neighborhood is extra complexthan variety 2 neighborhoods.Considering it’s 2 to the energy of 7 or four to the vigour of 7 ifyou don’t forget, adequate. But nonetheless why we go for variety 1 regional and what’s the basicassumption? So, basic assumption is that in the event you rememberin this case, in type 1 nearby we expect that these are the 4 cells which is able to affectyou. So, expect that these diagonal cells should not sincerely affecting the cells becausewe assume that these are very close to one another and diagonals cells are bit a long way to eachother. So, this is the very common assumptions thatwe are taking that, both the diagonals cells coupling are usually not prominent or now not in minuteor diagonals cells fall into. The idea is that that diagonal cells couplings are notprominent since they are more some distance than different from imperative cells or cells underneath faults andeven if your diagonal cells coupling are there’ll purpose a vertical or horizontal phone coupling.So, the idea could be very simple in other phrases saying that diagonal cells usually are not affectingI imply that so much the important telephone most effective horizontal and vertical cells are causing extra effectbecause of the symmetry and others diagonals.So, sort 2 neighborhoods are needed when diagonalcoupling are giant. For some style of case, in case you are going for larger coverageor bigger conformity to those compliances, so in many instances go for diagonal ingredients also.So, but you realize that quantity of faults is 2 to the vigour of seven and four to the vigour 7 order.So, you ought to pay more time and more rate. So, if you wish to go for more accuracy andall those stuff I mean extra self belief greater will be the cost. So, relying in your desires,depending for your test forms, so which you could go about this. Which local we are able to take?So, with this we come to the end of this lecture and end of the direction. Thank you very muchfor attending the lectures. So, for I mean do we can say, if you wish to take extra so,you can want more to the handouts, which are to be had there will probably be extra video lectures,you could download them and lot of references are there.So, anyplace you’ve got discovered outthere I mean considering that it was once having three courses like design, verification and trying out, graspthe one action so, that many time you have to go for references and we have now shop thatboth sort of references. So, exciting readers can go by way of thereferences which might be on hand within the handouts and which you can learn them in small print about it.But, being a ought to path you might have trust impacts of VLSI design in VLSI verification and VLSItest.So at some point you could not go on it, extensive we’ve got overview of this. Forany form of queries you can use the query- reply I mean blog or question- answer tabof the NPTEL internet site or that you can instantly e- mail us to me or professor Dekha within the mailsand you’re going to get the responses. Thank you as soon as once more for attending the lectures andall the satisfactory on your future. Thanks..

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